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Efficient use of system on chip (SoC) solutions for power system protection functions

Publicerad 2020-10-09


Om uppdragsgivaren
Hitachi ABB Power Grids is a pioneering technology leader.
Our leading power and digital technologies, advanced automation systems and open digital platforms transform our customers’ businesses and deliver significant operational and business value.
Only through the effective digitalization of all elements of the energy value chain can this be delivered. At Hitachi ABB Power Grids we use leading open digital platforms to bring our grids into the age of the sustainable energy future.

We are contributing pioneering solutions that are making the world’s power grids stronger, smarter and greener. The result is grids that are more reliable, intelligent and focused on a sustainable energy future for all. Through Hitachi ABB Power Grids’ advanced portfolio of sustainable, digital energy solutions, we will create even more value for customers spanning the energy utilities and industry sectors, to mobility, IT and Life Cities sectors.

Beskrivning av examensarbetet
Intelligent Electronic Devices IEDs are CPU-based embedded devices essential for power grids. These devices
collect data from the grid, e.g., current and voltage, to integrate a multitude of fault-detection mechanisms
to maximize grid availability. For example, modern IEDs implement functions such as diff erential current or time
overcurrent protection that operators can configure to locate and isolate faulty sections of the grid.
Further extension of functionality in product definitions is desired by customers to create even more cost efficient
solutions but is currently limited by CPU capacity in the embedded device. However, many chip manufacturers
today provide system on chip SoC solutions for industrial embedded devices with additional computational
cores in addition to main CPU cores such as peripheral DSP cores. DSP cores are specialized cores
optimized for the operational needs of signal processing, which have a similar processing structure compared
to voltage and current protection functions implemented in IEDs. At the same time the protection functions are
interconnected to each other as well to communication protocols, supervision and I/O control systems running
in the main CPU cores.
In this thesis, you will study the viability of distributing some of the workload of the protection device to the peripheral
DSP cores, reducing the utilization of the general-purpose CPUs. Moreover, many of these functions
have real-time requirements with strict execution deadlines sensitive to both latency and jitter. One of the main
challenges for moving functionality to the DSP cores is that, on top of the execution time, it has the additional
time of communication between the DSP and CPU cores to report the execution results. The tasks are divided
into:
• Find characteristics to identify protection functions to be moved to the DSP cores while satisfying their
deadlines.
• Research and implement the best alternative to transfer the functions’ results between the DSP and
general-purpose cores.
• Research viable DSP offloading design partitioning from assigning single function to full application of
interconnected functions to the DSP cores.
• Study switching during runtime protection functions to the DSP depending on the IED configuration
loaded by the operator.
• Optimize which protection functions to be moved to the DSP given a configuration.

Kontaktperson
Francisco Pozo
francisco.pozo@hitachi-powergrids.com
0765616796


Tillbaka
  Utbildningsområde
Data/nätverk

Uppdragsgivare
Hitachi ABB Power Grids

Ort
Västerås

Sista ansökningdag
2021-01-07

Länkar
Thesis Description
Hitachi ABB Power Gr


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